1. Field of the Invention
The present invention relates to a solid state image sensor, and more specifically to a solid state image sensor having a peripheral circuit including a non-volatile memory transistor of the structure for trapping electric charges in an insulating means under a gate electrode to change a threshold voltage.
2. Description of Related Art
Ordinarily, a substrate voltage of a solid state image sensor is set to a voltage to minimize a blooming of a signal charge in a photoelectric conversion section. This voltage is different from one device from another, and therefore, it was required to be set in each device after it is assembled in a camera. In order to set this voltage, various circuits have been proposed. For example, when a substrate voltage generating circuit is internally provided in the device as a peripheral circuit, the substrate voltage generating circuit generates an optimum value from an externally supplied voltage. This optimum value is obtained by storing electric charges in a non-volatile memory transistor located in a resistor dividing circuit to change a threshold voltage of the non-volatile memory transistor thereby to obtain a desired voltage.
The non-volatile memory transistor included in the substrate voltage generating circuit includes an MNOS (metal-Si.sub.3 N.sub.4 --SiO.sub.2 --Si) type, MONOS (metal-SiO.sub.2 --Si.sub.3 N.sub.4 --SiO.sub.2 --Si) type, and a floating gate type. In the following, the MNOS type non-volatile memory transistor will be described as one example.
Referring to FIG. 5, there is shown a diagrammatic sectional view illustrating the prior art MNOS type non-volatile memory transistor. The shown MNOS type non-volatile memory transistor includes a P-type semiconductor substrate having an N.sup.+ source diffused layer 2 and an N.sup.+ drain diffused layer 3 formed in a principal surface thereof. As a gate insulator film, a gate oxide film 4 and a gate nitride film 5 are formed on the principal surface of the P-type semiconductor substrate between the N.sup.+ source diffused layer 2 and the N.sup.+ drain diffused layer 3 in the name order. On this gate insulator film, a gate electrode 6, a first interlayer insulator film 7 and a second interlayer insulator film 10 are formed in the named order.
A threshold voltage of this MNOS type non-volatile memory transistor is determined by an impurity concentration of the P-type semiconductor substrate between the N.sup.+ source diffused layer 2 and the N.sup.+ drain diffused layer 3, the film thickness of the gate oxide film 4 and the gate nitride film 5, and a conducting material constituting the gate electrode 6. If the gate electrode 6 is applied with a predetermined voltage which is positive in comparison with the N.sup.+ source diffused layer 2, electrons are injected into an interface between the gate oxide film 4 and the gate nitride film 5, so that the injected electrons are trapped in trapping centers 61 formed in the interface between the gate oxide film 4 and the gate nitride film 5, with the result that the threshold voltage of the MNOS type non-volatile memory transistor becomes a large value. On the other hand, if the N.sup.+ source diffused layer 2 is applied with a predetermined voltage which is positive in comparison with the gate electrode 6, the electrons trapped in the trapping centers 61 at the interface between the gate oxide film 4 and the gate nitride film 5 are drawn out, with the result that the threshold voltage of the MNOS type non-volatile memory transistor returns to an original value. The trapping and drawing-out of the electric charges in the non-volatile memory transistor is carried out in a device testing step.
However, when the solid state image sensor is used in the camera, light is incident on not only an image sensing region but also the region other than the image sensing region. If this light, particularly, light in a ultraviolet region is incident on the above mentioned non-volatile memory transistor, the electric charges trapped in the insulating film under the gate electrode obtain an energy, and when the energy becomes larger than an energy level of the trapping center, the electric charge is discharged from the trapping center, with the result that the threshold voltage of the MNOS type non-volatile memory transistor unintentionally changes. In other words, the characteristics of the peripheral circuit including the non-volatile memory transistor changes, with the result that the substrate voltage set once unintentionally changes.